1. Field of the Invention
The present invention relates to a switched mode power supply.
2. Description of the Related Art
The general present tendency to reduce the sizes of the electronic devices requires power supplies that produce a low voltage that is stable and precise and will have a small size and good efficiency. Among such types of power supplies are those so-called in switched mode (switched mode power supplies). Shown in FIG. 1 is a typical power supply that comprises a circuit 100 with a primary winding 101 of a transformer and with a respective input voltage Vin, and which further comprises three circuits 200, 300 and 400, each provided with a secondary winding 201, 301, 401 of the transformer and producing an output voltage Vo1, Vo2, Vo3 at the terminals of a respective load. The main output Vo1 of the circuit 200 is regulated by a fixed frequency PWM controller 102, which is placed in feedback between the output Vo1 and the circuit 100 provided with the primary winding. The PWM controller 102 regulates the output voltage Vo1 with respect to each change of the input voltage Vin and to each change of a load LD, while as regard to the output voltages Vo2 and Vo3, each change of the input voltage Vin is regulated by the action of the PWM controller 102, but the changes of the loads relating to the voltages Vo2 and Vo3 are not considered by the PWM controller because the circuits 300, 400 are in open loop configuration with respect to the circuit 100. Post regulators 302, 402, as, for example, linear regulators, DC/DC converters, magnetic amplifiers (mag-amps), are necessary to regulate the voltages Vo2 and Vo3 with respect to the changes of the load.
The linear regulators represent a simple and easy-to-design solution. However they present a low efficiency, and for this reason they are utilized above all in low current applications.
The DC/DC converters can be an efficient solution because they allow a good regulation of the output voltage. However they show considerable drawbacks due to the cost of the DC/DC converter, which includes power switches, inductors, capacitors and controllers. Also the DC/DC converter generates added noise and added disturbances which require added filters.
The magnetic amplifiers can be considered as post regulators provided with a programmable delay switch. In fact the magnetic amplifiers have the capability to block some volt/second values of the input voltage to provide a smaller output duty-cycle than the input duty-cycle. The blocked volt/second value depends on the magnetic amplifier feedback loop that controls the output voltage by resetting the saturable core. The magnetic amplifiers generally comprise a reactor provided with a magnetic core and with a control circuit able to reset the magnetic core.
A typical application of a magnetic amplifier consists of a multi-output forward converter shown in FIG. 2 (which includes a portion of the circuit of FIG. 1), where the primary 101 of the transformer, which receives in input the voltage Vin, is placed in series to a switch MOS M1 at the gate terminal of which a voltage signal is present, which is the output voltage Vo1 of the circuit 200 comprising the secondary winding 201 of the transformer, which is regulated by the fixed frequency PWM controller 102. A second circuit 24, which is similar to one of the circuits 300 or 400 of FIG. 1, comprises a secondary winding 25 of the transformer, a reactor 26 provided with a magnetic core and connected to the winding 25 and to the anode of a diode D1; the cathode of the diode D1 is connected to the cathode of a diode D2 placed in parallel to a filter LC and which has the anode connected to the secondary winding 25. A control circuit 27 is connected to the common terminal of the inductance L and of the capacitor C of the filter LC and it is coupled to the anode of the diode D1 by means of another diode D3 placed so that its cathode is connected to the anode of the diode D1. The voltage signal VD2 present at the terminals of the diode D2 is a pulse width modulated waveform which provides a continuous output signal Vo. The pulse width of the signal VD2 is controlled by the duty-cycle of the switch MOS M1 and by the saturable reactor 26. When the reactor 26 is in an unsaturated state (off state) it blocks the voltage Vs1 at the terminals of the secondary winding 25, while, when the reactor 26 is in a saturated state (on state), it shows a low impedance and therefore it blocks a small part of the voltage Vs1.
In FIG. 3 the time diagrams of the voltages and currents associated with the line of the circuit of FIG. 2 for the continuous inductor conduction mode (CCM) are shown; the voltage Vs1 at the terminals of the secondary winding 25, the voltage Vs2 between the anode of the diode D1 and ground, the voltage Vma which is the difference between the voltages Vs1 and Vs2, the voltage VD2 at the terminals of the diode D2 and the current IL at the terminals of the inductance L of the filter LC are shown. The time periods ton1 and toff1 are the switching periods of the MOS switch M1, while the period Ts is the whole switching period. The time period tb is the time period during which the reactor is in off state and therefore in such period the magnetic amplifier blocks a volt/second value equal to an area B. The time period during which the reactor 26 is in on state is ton2, and in such time period the voltage VD2 at the terminals of the diode D2 is high and therefore the current IL rises. During the period tr the reactor 26 is reset by the control circuit 27. The reset area A is equivalent to the area B.
In FIG. 4 the time diagrams of the voltages Vs1, Vs2, Vma, Vd2, and of the current IL which are associated with the lines of the circuit of FIG. 2 for a discontinuous inductor conduction mode (DCM) are shown; the considerations made for the case of the continuous inductor conduction mode are still valid. However, in this case, a positive voltage equal to Vdo appears at the terminals of the diode D2 during the dead time td during which the current IL in the inductor L is zero. Also, in the DCM conduction case, the time tb is longer than that in the CCM case; this is due to the fact that in the DCM case more stresses are in the reactor 26 than in the CCM case.
In FIG. 5A the control circuit 27 is shown in more detail in the case wherein the control circuit 27 implements a voltage reset. Such circuit 27 comprises a pnp transistor Q1 the emitter terminal of which is coupled to a positive supply voltage Vcc+ and the collector terminal of which is coupled to a negative supply voltage Vccxe2x88x92. The base terminal of a second npn transistor Q2 is connected to the collector terminal which has the collector terminal connected to ground and the emitter terminal connected to the anode of the diode D3. The current that flows through the transistor Q1 is controlled by means of an operational amplifier 50 which compares the output voltage Vo of the circuit 24 with a reference voltage VRef. Any variations of the output voltage Vo with respect to the reference voltage VRef causes a variation of the signal driving the transistor Q1, and it determines a change of a reset current Ir. The change of the reset current Ir causes a change of the volt/second value of the area B, causing a regulation of the output voltage Vo. The loop gain of the voltage reset circuit is approximately unity. The block Comp is configured to stabilize the system.
In FIG. 5B the time diagrams of the voltage Vs2 and of the reset current Ir, which are relative to the circuit of FIG. 5A, are shown.
In FIG. 6A the control circuit 27 of FIG. 2 is shown in more detail in the case wherein such circuit implements a current reset. Such configurations differs from the circuit configuration of FIG. 5A because a pnp transistor Q6 having the emitter terminal coupled to the positive supply voltage Vcc+ has the collector terminal connected directly to the anode of the diode D3. In such configuration the pnp transistor is utilized to provide the current Ir which must reset the core of the reactor 26. The current Ir flows in the transistor Q6 even when the voltage Vs1 is zero to allow a pre-charge of the core. The control of the current is carried out by means of the operational amplifier 50 and the reference voltage Vref. The use only of the positive supply voltage Vcc+, even if it is easier to be obtained, is bound to the regulated output voltage. This adds another loop to the system which bypasses the error compensation and makes more difficult the stabilization of the system and also the design of the compensation network.
In FIG. 6B the time diagrams of the voltage Vs2 and of the reset current Ir which are relative to the circuit of FIG. 6A are shown.
The magnetic amplifiers can be utilized in forward-derived double-ended circuit topologies as push-pull, half-bridge, full-bridge. One among such circuit topologies is shown in FIGS. 7 and 8 where the secondary of the transformer has two windings 71, 72 with two reactors 73, 74 and with two diodes D1 the anodes of which are connected to the two cathodes of the two diodes D3. Between the common anode of the diodes D3 and an output terminal of the circuit it is possible to insert a circuit which implements a voltage reset as in FIG. 7 or a circuit which implements a current reset as in FIG. 8.
According to the disclosed embodiments of the present invention, a switched mode power supply is provided. In one embodiment of the power supply, a first circuit provided with a primary winding of a transformer to which a pulse voltage is applied, at least one second circuit comprising at least one secondary winding of said transformer, at least one reactor provided with a magnetic core and which has a terminal connected to a terminal of said at least one secondary winding, and at least one filter provided with input and output terminals and a first diode connected in parallel to the input terminals of the filter. In addition, the other terminal of the at least one reactor is connected to a terminal of the first diode, and a second diode, which has a terminal connected to the other terminal of the first diode and the other terminal connected to the other terminal of the at least one secondary winding and a control circuit coupled to a output terminal of the filter and to said other terminal of said at least one secondary winding is provided, the control circuit generating a current to reset the magnetic core of the at least one reactor.
The embodiments of the present invention form a switched mode power supply with a magnetic amplifier provided with a reset circuit that is simpler of the known circuits, which has less circuit components and which therefore allows low costs for its manufacture.